DocumentCode
3300415
Title
Minimal redundancy, low power bus coding
Author
Lindkvist, Tina ; Löfvenberg, Jacob
Author_Institution
Dept. of EE, Linkopings Universitet, Linkoping, Sweden
fYear
2005
fDate
21-22 Nov. 2005
Firstpage
277
Lastpage
280
Abstract
A new approach to low redundancy coding for reducing power dissipation in parallel on-chip, deep sub-micron buses is presented. It is shown that the new approach allows lower power dissipation than previous solutions in the given model, yielding reductions of 24% to 41% compared to uncoded transmission for the considered bus widths. Finally some important open problems are given.
Keywords
integrated circuit interconnections; integrated circuit modelling; low-power electronics; deep sub-micron buses; low power bus coding; parallel on-chip; power dissipation; Coupling circuits; Energy consumption; Frequency; Jacobian matrices; Parasitic capacitance; Power dissipation; Semiconductor device modeling; Throughput; Ultra large scale integration; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
NORCHIP Conference, 2005. 23rd
Print_ISBN
1-4244-0064-3
Type
conf
DOI
10.1109/NORCHP.2005.1597043
Filename
1597043
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