Low temperature (LT) grown GaAs buffer layers for III-V semiconductor processes

Author

Weatherford, T.R.

Author_Institution

Dept. of Electr. & Comput. Eng., Naval Postgraduate Sch., Monterey, CA, USA

fYear

1999

fDate

17-20 Oct. 1999

Firstpage

47

Lastpage

50

Abstract

Low Temperature Grown (LTG) GaAs buffers have been shown to eliminate backgating, reduce subthreshold leakage, provide ultrashort carrier lifetimes and radiation hardness. However, undoped LTG buffers have shown poor reliability, poor RF performance and inconsistent lot-to-lot properties. Recent p-doped LT GaAs buffers promise thermally stable material to withstand changes during annealing steps, plus improved performance over undoped LT GaAs buffers.

Keywords

III-V semiconductors; carrier lifetime; gallium arsenide; leakage currents; low-temperature techniques; molecular beam epitaxial growth; radiation hardening (electronics); semiconductor epitaxial layers; semiconductor growth; GaAs; III-V semiconductor processes; RF performance; annealing steps; backgating; lot-to-lot properties; low temperature grown GaAs buffer layers; radiation hardness; reliability; subthreshold leakage; thermally stable material; ultrashort carrier lifetimes; Annealing; Buffer layers; Conductivity; Crystalline materials; Electron traps; FETs; Gallium arsenide; III-V semiconductor materials; Molecular beam epitaxial growth; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

GaAs IC Symposium, 1999. 21st Annual

Conference_Location

Monterey, CA, USA

ISSN

1064-7775

Print_ISBN

0-7803-5585-7

Type

conf

DOI

10.1109/GAAS.1999.803724

Filename

803724