Title :
Synthesis Of Hazard-free Multi-level Logic Under Multiple-input Changes From Binary Decision Diagrams
Author :
Lin, Bill ; Devadas, Srinivas
Keywords :
Binary decision diagrams; Boolean functions; Circuits; Data structures; Delay; Hazards; Laboratories; Logic functions; Network synthesis; Wire;
Conference_Titel :
Computer-Aided Design, 1994., IEEE/ACM International Conference on
Print_ISBN :
0-8186-3010-8
DOI :
10.1109/ICCAD.1994.629874
