Ternary Stimulus for Fully Digital Dynamic Testing of SC S? ADCs

Author

Dubois, Matthieu ; Stratigopoulos, Haralampos-G ; Mir, Salvador

Author_Institution

TIMA Lab., Grenoble INP-UJF, Grenoble, France

fYear

2012

fDate

14-16 May 2012

Firstpage

5

Lastpage

10

Abstract

In this paper, a ternary stimulus is proposed for testing ΣΔ Analog-to-Digital Converters (ADCs). The ternary stimulus is composed of three logic levels {-1,0,1} and is obtained by adding a binary stream with a delayed version of itself. Only four switches are added to the input stage of the modulator of the ΣΔ ADC for facilitating the injection of the ternary stimulus. Compared to a binary stimulus, the ternary stimulus contains less quantization noise and allows measuring the SNDR of the ΣΔ ADC for the whole input dynamic range. We discuss the optimization of the ternary stimulus and we demonstrate its efficiency using behavioral simulations of a second-order switched-capacitor (SC) ΣΔ modulator.

Keywords

circuit testing; dynamic testing; modulators; sigma-delta modulation; switched capacitor networks; switches; ΣΔ analog-to-digital converter; SC ΣΔ ADC modulator; SNDR; binary stimulus; binary stream; fully digital dynamic testing; logic level; quantization noise; second-order switched-capacitor ΣΔ modulator; switch; ternary stimulus optimization; whole input dynamic range; Accuracy; Delay; Modulation; Optimization; Quantization; Signal to noise ratio;

fLanguage

English

Publisher

ieee

Conference_Titel

Mixed-Signals, Sensors and Systems Test Workshop (IMS3TW), 2012 18th International

Conference_Location

Taipei

Print_ISBN

978-1-4673-1925-6

Type

conf

DOI

10.1109/IMS3TW.2012.12

Filename

6298745