DocumentCode :
3301577
Title :
Testing and Fault Diagnosis of Time-Interleaved S? Modulators Using Checksums
Author :
Lee, HsunGêÆCheng ; Abraham, Jacob A.
Author_Institution :
Comput. Eng. Res. Center, Univ. of Texas at Austin, Austin, TX, USA
fYear :
2012
fDate :
14-16 May 2012
Firstpage :
11
Lastpage :
16
Abstract :
Mismatch of components in a time-interleaved ADC (TIADC) is a major problem which can significantly degrade the performance, even with a 0.5% mismatch. This paper describes a new technique which uses checksums for diagnosing the mismatch of components among sub-ADCs in a TIADC. In our checksum formulation, a transition matrix is used to represent the transition relationship between the current state and the next state of modulators, while another matrix is used to represent the states of a TIADCs, where the state of a sub-ADC is presented in a column vector. We have applied the checksum technique to a TIADC which contains two 1-bit fifth-order ΣΔ modulators with matched resistances and capacitances, and demonstrated that the checksums successfully detect and locate mismatches.
Keywords :
fault diagnosis; matrix algebra; sigma-delta modulation; TIADC testing; checksum formulation; column vector; component mismatch diagnosis; fault diagnosis; fifth-order ΣΔ modulators; modulators; sub-ADC; time-interleaved ΣΔ modulators; time-interleaved ADC; transition matrix; Bandwidth; Equations; Fault diagnosis; Mathematical model; Modulation; Testing; Vectors; Checksums; Design for Test; Testing; Time-Interleaved ADC;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Mixed-Signals, Sensors and Systems Test Workshop (IMS3TW), 2012 18th International
Conference_Location :
Taipei
Print_ISBN :
978-1-4673-1925-6
Type :
conf
DOI :
10.1109/IMS3TW.2012.13
Filename :
6298746
Link To Document :
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