Title :
Trench storage capacitors for high density DRAMs
Author :
Rajeevakumar, T.V. ; Lii, T. ; Weinberg, Z.A. ; Bronner, G.B. ; McFarland, P. ; Coane, P. ; Kwietniak, K. ; Megdanis, A. ; Stein, K.J. ; Cohen, S.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
The authors have demonstrated trench capacitors with openings down to 0.25 mu m*0.25 mu m and aspect ratios as high as 40, and with a capacitance of 31 fF for 8 nm equivalent ONO (oxide/nitride/oxide) thickness. The projected trench dimensions for a 256 Mb DRAM are 0.25 mu m*0.40 mu m*4 mu m, yielding a capacitance of 30 fF when a 5 nm thick oxide dielectric is used. A capacitance of about 50 fF has been obtained using 8 nm oxide-equivalent ONO dielectric with trench dimensions of 0.25 mu m*0.4 mu m*11.5 mu m.<>
Keywords :
DRAM chips; capacitance; capacitors; dielectric thin films; integrated circuit technology; 256 Mbit; 31 fF; 50 fF; 8 nm; SiO/sub 2/-Si/sub 3/N/sub 4/-SiO/sub 2/; aspect ratios; capacitance; high density DRAMs; oxide-equivalent ONO dielectric; trench dimensions; trench storage capacitors; Appropriate technology; Capacitance measurement; Capacitors; Dielectric materials; Etching; High-K gate dielectrics; Insulation; Lithography; Random access memory; Surface topography;
Conference_Titel :
Electron Devices Meeting, 1991. IEDM '91. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-0243-5
DOI :
10.1109/IEDM.1991.235295
