FLASH modelling for wearleveling algorithms

The recent trend in the storage industry is the use of flash based solid state disks (SSD) as compared to the power hungry mechanical disks. The endurance of Flash based SSD is still (important area of research) a major challenge. However improvement can be made by considering the design of FTL (flash translation layer) and time it takes to access or erase the data. Improvements can be made in all the major functions of FTL, which includes implementation of wear leveling and address translation. Developing fast and reliable algorithms for wear leveling will not only increase the life time of the flash devices but will also ensure faster erase and write operations. This paper presents a test development environment for modeling the flash storage which is used for the wear leveling algorithm testing using Matlab. Cost Age Times (CAT) algorithm is analyzed using the test-bed environment and enhancement is proposed which has improved erasure count by 25%.