A multiple-valued SRAM with combined single-electron and MOS transistors

Reports a new type of single-electron memory that works as a multiple-valued SRAM. A schematic of the proposed memory is shown. The source of a MOSFET with fixed gate bias V/sub gg/ is connected to the drain of a single-electron transistor (SET), and the SET drain voltage is kept nearly constant around V/sub gg/-V/sub th/, where V/sub th/ is the threshold voltage of the MOSFET. This V/sub gg/-V/sub th/ is set low enough to sustain the Coulomb-blockade condition. By connecting the SET gate to the MOSFET drain, the I/sub d/-V/sub gs/, (3-terminal) characteristics of the SET are converted to the I-V (2-terminal) characteristics of the combined SET-MOSFET circuit. With a proper choice of load device, the periodic nature of the I-V characteristics results in a number of stability points, and this realizes the multiple-valued memory operation.