Title :
0.1- mu m-gate, ultrathin-film CMOS devices using SIMOX substrate with 80-nm-thick buried oxide layer
Author :
Omura, Y. ; Nakashima, S. ; Izumi, K. ; Ishii, T.
Author_Institution :
NTT LSI Labs., Kanagawa, Japan
Abstract :
A 0.1- mu m-gate CMOS/SIMOX (separation by implanted oxygen) has been successfully fabricated using high quality SIMOX substrates and an advanced design concept for the subquarter-micron region based on a simple device model. In addition, both 85-nm-gate n- and p-MOSFETs/SIMOX with 8-nm-thick silicon active layer have been realized. High parasitic resistance in the source and drain regions of the 0.1- mu m-gate CMOS/SIMOX tends to increase the propagation delay time. However, 0.1- mu m-gate CMOS/SIMOX devices with a delay time as low as 10 ps can be obtained by reducing the parasitic resistance.<>
Keywords :
CMOS integrated circuits; SIMOX; 0.1 micron; 10 ps; 8 nm; 85 nm; SIMOX substrate; Si-SiO/sub 2/; design concept; parasitic resistance; propagation delay time; separation by implanted oxygen; short channel effect; ultrathin-film CMOS devices; Delay effects; Fabrication; Guidelines; MOS devices; MOSFET circuits; Power capacitors; Propagation delay; Semiconductor films; Silicon; Substrates;
Conference_Titel :
Electron Devices Meeting, 1991. IEDM '91. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-0243-5
DOI :
10.1109/IEDM.1991.235332
