DocumentCode
3303298
Title
A T-gate overlapped LDD device with high circuit performance and high reliability
Author
Kurimoto, K. ; Odanaka, S.
Author_Institution
Matsushita Electric Ind. Co. Ltd., Osaka, Japan
fYear
1991
fDate
8-11 Dec. 1991
Firstpage
541
Lastpage
544
Abstract
The authors describe a novel T-gate overlapped LDD (lightly doped drain) device having the thick gate-oxide above the LDD region. It is shown that the thick gate-oxide above the LDD region is effective in reducing the vertical electric field in the LDD region and gate-drain overlapped capacitance. The T-gate overlapped LDD structure provides low gate-induced drain leakage (GIDL) and high speed/low power dissipation. This device improves by 3.5 V the subbreakdown voltage induced by the GIDL. The 0.6- mu m T-gate overlapped LDD device provides almost the same hot-carrier resistance, and represents a circuit speed of 65 ps/stage at Vdd=3 V and 15% improvement in power dissipation when compared with the 0.6- mu m gate overlapped drain device.<>
Keywords
capacitance; electric breakdown of solids; hot carriers; insulated gate field effect transistors; leakage currents; reliability; 0.6 micron; 3 V; 65 ps; T-gate overlapped LDD device; gate-drain overlapped capacitance; high reliability; high speed; hot-carrier resistance; lightly doped drain; low gate-induced drain leakage; low power dissipation; subbreakdown voltage; thick gate-oxide; vertical electric field; Capacitance; Circuit optimization; Electric resistance; Hot carriers; Ion implantation; MOSFETs; Oxidation; Power dissipation; Semiconductor device reliability; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1991. IEDM '91. Technical Digest., International
Conference_Location
Washington, DC, USA
ISSN
0163-1918
Print_ISBN
0-7803-0243-5
Type
conf
DOI
10.1109/IEDM.1991.235337
Filename
235337
Link To Document