DocumentCode

3303431

Title

Optimization Of Hierarchical Designs Using Partitioning And Resynthesis

Author

Eikerling, Heinz-Josef ; Hunstock, Ralf ; Camposano, Raul

fYear

1994

fDate

6-10 Nov 1994

Firstpage

707

Lastpage

712

Keywords

Automata; Automatic control; Boolean functions; Costs; Delay; Design optimization; Digital circuits; High level synthesis; Logic design; Logic gates;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer-Aided Design, 1994., IEEE/ACM International Conference on

ISSN

1063-6757

Print_ISBN

0-8186-3010-8

Type

conf

DOI

10.1109/ICCAD.1994.629900

Filename

629900