DocumentCode
3303567
Title
On development of 600-850 V 6H-SiC LDMOS transistors using silane-ambient implant anneal
Author
Sankin, I. ; Casady, J.B. ; Dufrene, J.B. ; Draper, W.A. ; Kretchmer, J. ; Vandersand, J. ; Kumar, V. ; Mazzola, M.S. ; Saddow, S.E.
Author_Institution
Dept. of Electr. & Comput. Eng., Mississippi State Univ., MS, USA
fYear
2001
fDate
25-27 June 2001
Firstpage
205
Lastpage
206
Abstract
In this work, we report on development of 600-850 V SiC LDMOSFET´s, which for the first time utilize silane-overpressure implant annealing, in comparison to earlier works. A 2-D model using Medici/sup TM/ software from Avant! Corporation was used to optimize the structure, and a modified implant anneal with silane overpressure was used to improve the surface morphology of implanted regions. Further, drain and gate electrode extensions were used to increase the blocking voltage.
Keywords
annealing; ion implantation; power MOSFET; semiconductor device models; silicon compounds; wide band gap semiconductors; 2D model; 600 to 850 V; 6H-SiC LDMOS transistor; Avant! Corporation; Medici software; SiC; blocking voltage; silane-overpressure implant annealing; surface morphology; Annealing; Electrodes; Fingers; Implants; Rough surfaces; Silicon carbide; Surface morphology; Surface roughness; Temperature control; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference, 2001
Conference_Location
Notre Dame, IN, USA
Print_ISBN
0-7803-7014-7
Type
conf
DOI
10.1109/DRC.2001.937933
Filename
937933
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