A CMOS FPTA chip for intrinsic hardware evolution of analog electronic circuits

Author

Langeheine, Jörg ; Becker, Joachim ; Fölling, Simon ; Meier, Karlheinz ; Schemmel, Johannes

Author_Institution

Kirchhoff-Inst. for Phys., Heidelberg Univ., Germany

fYear

2001

fDate

2001

Firstpage

172

Lastpage

175

Abstract

This paper describes and discusses an intrinsic approach to hardware evolution of analog electronic circuits using a Field Programmable Transistor Array (FPTA). The FPTA is fabricated in a 0.6 μm CMOS process and consists of 16×16 transistor cells. The chip allows to configure the gate geometry as well as the connectivity of each of the 256 transistors. Evolutionary algorithms are to be run on a commercial PC to produce the new circuit configurations that are downloaded to the chip via a PCI card. In contrast to extrinsic hardware evolution all environmental conditions present on the device under test have to be taken into account by the evolutionary algorithm. Thus a selection pressure is raised towards solutions that actually work on real dice

Keywords

CMOS analogue integrated circuits; evolutionary computation; programmable logic devices; CMOS FPTA chip; Field Programmable Transistor Array; analog electronic circuits; evolutionary algorithm; hardware evolution; Analog circuits; CMOS analog integrated circuits; Design automation; Electronic circuits; Geometry; Hardware; MOSFETs; Physics; Space exploration; Tuned circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Evolvable Hardware, 2001. Proceedings. The Third NASA/DoD Workshop on

Conference_Location

Long Beach, CA

Print_ISBN

0-7695-1180-5

Type

conf

DOI

10.1109/EH.2001.937959

Filename

937959