On the testability of CMOS circuits

To ensure very reliable, high-quality CMOS products, adequate design strategies are required to make the circuits easily testable for all defects that may occur during the fabrication process. The authors first examine what kind of input patterns have to be used to detect stuck-open faults in CMOS circuits. Then they consider the testability problems that one can encounter when CMOS devices are used in the realization of digital systems. In particular, they study how testability can be insured in circuits containing stuck-open defects. Finally, they propose some solutions to the testability problem of CMOS circuits affected by potential glitches and charge sharing