An improved analytical LDD-MOSFET model for digital and analog circuit simulation for all channel lengths down to deep-submicron

Author

Lemaitre, B.

Author_Institution

Siemens AG, Munchen, Germany

fYear

1991

fDate

8-11 Dec. 1991

Firstpage

333

Lastpage

336

Abstract

An improved analytical LDD (lightly doped drain)-MOSFET model for digital and analog circuit simulation in the deep-submicron region is described. This model includes all short and narrow channel effects and a substrate current model. Special emphasis was placed on the voltage-dependent effective channel length and series resistance of LDD devices. The voltage-dependent channel length and series resistance of LDD devices are measured electrically, verified with capacitance measurements, and introduced into the model.<>

Keywords

insulated gate field effect transistors; semiconductor device models; LDD-MOSFET model; analog circuit simulation; analytical model; capacitance measurements; deep submicron channel lengths; deep-submicron region; digital circuit model; lightly doped drain; narrow channel effects; short channel effects; substrate current model; voltage dependent series resistance; voltage-dependent channel length; voltage-dependent effective channel length; Analog circuits; Analytical models; Capacitance measurement; Circuit simulation; Electric resistance; Electric variables measurement; Electrical resistance measurement; Length measurement; MOSFET circuits; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1991. IEDM '91. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-0243-5

Type

conf

DOI

10.1109/IEDM.1991.235385

Filename

235385