Modeling data transfer signal timings in DAME

The timing interface design subsystem in DAME (Design Automation of Microprocessor based systems, using an Expert system approach) is discussed. The timing design subsystem ensures that all signals produced by the interface between components meet the required timing specifications. A main goal of the timing and signal model is the abstraction of common features found in the data transfer timings of most components. This allows relatively few common rules to be used for the interface design which apply to all components. The authors introduce the timing and signal model used to specify the data transfer timing of microprocessor components. Examples of the different timing protocol templates are given, and the design strategy used by the timing design subsystem is discussed