DocumentCode
3304240
Title
Low thermal budget antimony/phosphorus NMOS technology for CMOS
Author
Harame, D.L. ; Ganin, E. ; Comfort, J.H. ; Sun, J.Y.-C. ; Acovic, A. ; Cohen, S.A. ; Ronsheim, P.A. ; Verdonckt-Vandebroek, S. ; Restle, P.J. ; Ratanaphanyarat, S. ; Saccamango, M.J. ; Johnson, J.B. ; Furkay, S.A.
Author_Institution
IBM, Yorktown Heights, NY, USA
fYear
1991
fDate
8-11 Dec. 1991
Firstpage
645
Lastpage
648
Abstract
A novel antimony-preamorphized phosphorus process (Sb/P) for NMOS source/drain formation is presented. It is demonstrated that very shallow (>
Keywords
CMOS integrated circuits; VLSI; integrated circuit technology; ion implantation; 0.15 micron; 0.25 micron; 7 nm; CMOS; NMOS transistors; RTA; Sb preamorphization; Si:Sb,P; ULSI; channel hot carrier reliability; channel length; deep submicron; device characteristics; gate induced drain leakage; gate oxide; ideal diode characteristics; low leakage current; low thermal budget process; punch-through voltage; scalable; short-channel effects; CMOS process; CMOS technology; Diodes; Furnaces; Hot carriers; Leakage current; MOS devices; MOSFETs; Ultra large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1991. IEDM '91. Technical Digest., International
Conference_Location
Washington, DC, USA
ISSN
0163-1918
Print_ISBN
0-7803-0243-5
Type
conf
DOI
10.1109/IEDM.1991.235389
Filename
235389
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