A sub-half micron partially gate-to-drain overlapped MOSFET optimized for high performance and reliability

A partially gate-to-drain overlapped n-channel MOSFET using poly spacers was studied and compared to a fully overlapped and a conventional oxide spacer device in terms of performance and reliability. It is shown that, for a 500-AA partial overlap (flanked with 700-AA oxide spacer) device, the gate-to-drain overlap capacitance and simulated inverter delay are only 12% and 8%, respectively, higher than those of a conventional oxide spacer device. At a given performance level, the partial overlap device has two orders of magnitude longer DC hot-carrier lifetime than that of an oxide spacer device. The reason the overlapped device has high resistance to the hot-carrier stressing is the adverse oxide field at V/sub G/>