A self-convergence erasing scheme for a simple stacked gate flash EEPROM

Author

Yamada, S. ; Suzuki, T. ; Obi, E. ; Oshikiri, M. ; Naruke, K. ; Wada, M.

Author_Institution

Toshiba Corp., Kawasaki, Japan

fYear

1991

fDate

8-11 Dec. 1991

Firstpage

307

Lastpage

310

Abstract

A novel erasing method for simple stacked gate flash EEPROMs is described. The method makes use of avalanche hot carrier injection after erasure by Fowler-Nordheim tunneling. The threshold voltages converge to a certain ´steady-state´ as a result of the injection. The steady-state is caused by a balance between avalanche hot electron injection into the floating gate and avalanche hot hole injection into the floating gate, and can be controlled easily by the channel doping. Tight distribution of threshold voltages and stable erasure without over-erased cells are demonstrated by applying cells using 0.6- mu m CMOS technology. In addition, short erase time is realized using the novel erase sequence.<>

Keywords

CMOS integrated circuits; EPROM; VLSI; integrated memory circuits; 0.6 micron; CMOS; Fowler-Nordheim tunneling; ULSI; avalanche hot carrier injection; avalanche hot electron injection; avalanche hot hole injection; channel doping; erase sequence; floating gate; self-convergence erasing scheme; short erase time; stacked gate flash EEPROM; threshold voltages; CMOS technology; EPROM; Flash memory; Hot carrier injection; Hot carriers; Nonvolatile memory; Secondary generated hot electron injection; Steady-state; Threshold voltage; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1991. IEDM '91. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-0243-5

Type

conf

DOI

10.1109/IEDM.1991.235442

Filename

235442