DocumentCode :
3305299
Title :
A symmetrical side wall (SSW)-DSA cell for a 64 Mbit flash memory
Author :
Kodama, N. ; Oyama, K. ; Shirai, H. ; Saitoh, K. ; Okazawa, T. ; Hokari, Y.
Author_Institution :
NEC Corp., Kanagawa, Japan
fYear :
1991
fDate :
8-11 Dec. 1991
Firstpage :
303
Lastpage :
306
Abstract :
A 0.4- mu m stacked gate cell for a 64-Mb flash memory has been developed which has the symmetrical side wall diffusion self-aligned (SSW-DSA) structure. Using the proposed SSW-DSA cell with p/sup +/ pockets at both the drain and the source, an adequate punchthrough resistance to scale the gate length down to sub-half-micron has been obtained. It is also demonstrated that the uniform erasing scheme applying negative bias to the gate which is adopted for the SSW-DSA cell shows lower trapped charges after write/erase (W/E) cycles evaluated by a charge pumping technique, and results in better endurance and retention characteristics than nonuniform erasing schemes. This cell will enable the realization of a 64-Mb flash memory with single 5-V supply operation, 10/sup 6/ W/E endurance, and sector erasing scheme.<>
Keywords :
EPROM; MOS integrated circuits; VLSI; integrated memory circuits; 0.4 micron; 5 V; 64 Mbit; EEPROM; MOS IC; ULSI; charge pumping technique; diffusion self-aligned; endurance; flash memory; punchthrough resistance; retention characteristics; sector erasing scheme; single 5-V supply operation; single voltage supply; stacked gate cell; symmetrical side wall; uniform erasing scheme; Boron; Charge pumps; Degradation; Flash memory; Flash memory cells; Mechanical factors; National electric code; Nonvolatile memory; Secondary generated hot electron injection; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1991. IEDM '91. Technical Digest., International
Conference_Location :
Washington, DC, USA
ISSN :
0163-1918
Print_ISBN :
0-7803-0243-5
Type :
conf
DOI :
10.1109/IEDM.1991.235443
Filename :
235443
Link To Document :
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