DC characterization of GaInP/GaAs tunneling emitter bipolar transistors

The authors fabricated In/sub 0.49/Ga/sub 0.51/P/GaAs tunneling emitter bipolar transistors (TEBTs). The DC performance of the GaInP/GaAs TEBT with different barrier thicknesses (50 AA and 100 AA) at different temperatures (77 K and 300 K) was investigated. It was found that a very high current gain of 214 and a very small offset voltage of 40 mV were achieved without the need of grading. The gain of the thick barrier device at 77 K was almost the same as that at 300 K, while that of the thin barrier device increased when the temperature was lowered. A tunneling barrier of 100 AA could effectively block most of the hole flow from base to emitter and a DC gain comparable to conventional graded emitter HBT was achieved at room temperature. A thinner barrier of 50 AA suffered from more hole tunneling and had lower DC gain at room temperature. However, the gain of the thin barrier device increased at low temperature due to the shorter base transit time while the gain of the thick barrier device was almost unchanged due to the balance between the non-equilibrium and the diffusive electrons.<>