DocumentCode
3307070
Title
Increasing the cache efficiency by eliminating noise
Author
Pujara, Prateek ; Aggarwal, Aneesh
Author_Institution
Dept. of Electr. & Comput. Eng., Binghamton Univ., NY, USA
fYear
2006
fDate
11-15 Feb. 2006
Firstpage
145
Lastpage
154
Abstract
Caches are very inefficiently utilized because not all the excess data fetched into the cache, to exploit spatial locality, is utilized. We define cache utilization as the percentage of data brought into the cache that is actually used. Our experiments showed that Level 1 data cache has a utilization of only about 57%. In this paper, we show that the useless data in a cache block (cache noise) is highly predictable. This can be used to bring only the to-be-referenced data into the cache on a cache miss, reducing the energy, cache space, and bandwidth wasted on useless data. Cache noise prediction is based on the last words usage history of each cache block. Our experiments showed that a code-context predictor is the best performing predictor and has a predictability of about 95%. In a code context predictor, each cache block belongs to a code context determined by the upper order PC bits of the instructions that fetched the cache block. When applying cache noise prediction to L1 data cache, we observed about 37% improvement in cache utilization, and about 23% and 28% reduction in cache energy consumption and bandwidth requirement, respectively. Cache noise mispredictions increased the miss rate by 0.1% and had almost no impact on instructions per cycle (IPC) count. When compared to a sub-blocked cache, fetching the to-be-referenced data resulted in 97% and 44% improvement in miss rate and cache utilization, respectively. The sub-blocked cache had a bandwidth requirement about 35% of the cache noise prediction based approach.
Keywords
cache storage; power consumption; L1 data cache; bandwidth requirement; cache efficiency; cache miss rate; cache noise prediction; cache utilization; code-context predictor; energy consumption; noise elimination; spatial locality; subblocked cache; to-be-referenced data fetch; Bandwidth; Energy consumption; Hardware; History; Noise level; Noise reduction; Prefetching;
fLanguage
English
Publisher
ieee
Conference_Titel
High-Performance Computer Architecture, 2006. The Twelfth International Symposium on
ISSN
1530-0897
Print_ISBN
0-7803-9368-6
Type
conf
DOI
10.1109/HPCA.2006.1598121
Filename
1598121
Link To Document