DocumentCode :
3309527
Title :
Low Power Hardware Implementation of High Speed FFT Core
Author :
Sridharan, Akshay ; Viji, A.
Author_Institution :
Dept. of Electron., Anna Univ., Chennai, India
fYear :
2010
fDate :
20-21 June 2010
Firstpage :
223
Lastpage :
227
Abstract :
Fast Fourier transform (FFT) is an efficient algorithm to calculate Discrete Fourier Transform (DFT) and its inverse. A wide variety of applications like Digital Signal processing and image processing rely heavily on it. The FFT computation is done by the FFT processors and its design is a key factor for the application. The proposed design implements a radix-4 FFT processor, which incorporates a low power commutator and a Butterfly structure without a multiplier. The parallel pipe lined architecture of the processor also has higher throughput with lowered power consumption.
Keywords :
Computer architecture; Digital signal processing; Discrete Fourier transforms; Energy consumption; Fast Fourier transforms; Hardware; Image processing; Process design; Signal processing algorithms; Throughput; Radix-4; commutator; dragonfly structure; low power; shift addition;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advances in Computer Engineering (ACE), 2010 International Conference on
Conference_Location :
Bangalore, Karnataka, India
Print_ISBN :
978-1-4244-7154-6
Type :
conf
DOI :
10.1109/ACE.2010.34
Filename :
5532842
Link To Document :
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