DocumentCode
3309935
Title
Low-density parity-check accumulate codes
Author
Wang, Chung-Li ; Lin, Shu
Author_Institution
LSI Corp., Milpitas, CA, USA
fYear
2010
fDate
17-20 Oct. 2010
Firstpage
7
Lastpage
12
Abstract
This paper presents a class of high-rate codes called low-density parity-check accumulate (LDPCA) codes. The code design is the serial concatenation of an LDPC outer code and an accumulator with an interleaver. The iterative decoding for the LDPCA code design has complexity linear to the code length. When using regular LDPC codes with column weight 2, the proposed codes have low encoding complexity and are advantageous for hardware implementation. Simulation results show that the regular LDPCA codes have the same error performance with the regular LDPC codes at the waterfall region and outperform product accumulate codes at the error floor region. The investigation on weight distributions proves that regular LDPCA codes have the asymptotic minimum distance proportional to the code length. In addition, iterative decoding thresholds under density evolution are obtained with a Gaussian approximation.
Keywords
encoding; iterative decoding; parity check codes; Gaussian approximation; LDPC code; asymptotic minimum distance; code length; encoding complexity; error floor region; iterative decoding; low density parity check accumulate code; serial concatenation; Bit error rate; Complexity theory; Decoding; Encoding; Iterative decoding; Simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Theory and its Applications (ISITA), 2010 International Symposium on
Conference_Location
Taichung
Print_ISBN
978-1-4244-6016-8
Electronic_ISBN
978-1-4244-6017-5
Type
conf
DOI
10.1109/ISITA.2010.5650090
Filename
5650090
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