DocumentCode :
330994
Title :
The 3D RESURF junction
Author :
Udrea, F. ; Popescu, A. ; Milne, W.
Author_Institution :
Dept. of Eng., Cambridge Univ., UK
Volume :
1
fYear :
1998
fDate :
6-10 Oct 1998
Firstpage :
141
Abstract :
This paper reports a new device concept-the 3D RESURF junction, which is applicable to a large class of power devices which we term 3D power devices. The new class of devices features considerably superior breakdown performance compared to any lateral power devices reported to date and challenges the state-of-the art vertical devices such as the VDMOSFET. The 3D Double Gate devices also benefit by having a low on-resistance due to carrier modulation in the drift region. The 3D RESURF is demonstrated numerically through extensive, advanced 2-D and 3-D simulations
Keywords :
power semiconductor devices; semiconductor device breakdown; 2D numerical simulation; 3D RESURF junction; 3D double gate device; 3D numerical simulation; 3D power device; breakdown voltage; carrier modulation; lateral power device; on-resistance; Anodes; Art; Breakdown voltage; Cathodes; Diodes; Electric breakdown; Heating; Isolation technology; Medical simulation; Power engineering and energy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Conference, 1998. CAS '98 Proceedings. 1998 International
Conference_Location :
Sinaia
Print_ISBN :
0-7803-4432-4
Type :
conf
DOI :
10.1109/SMICND.1998.732318
Filename :
732318
Link To Document :
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