DocumentCode :
3312548
Title :
A METHODOLOGY FOR TESTING ARBITRARY BILATERAL BIT-LEVEL SYSTOLIC ARRAYS
Author :
Bandyopadhyay, Supriyo ; Bhattacharya, Bhargab B.
Volume :
2
fYear :
1990
fDate :
5-7 Nov 1990
Firstpage :
856
Keywords :
Combinational circuits; Computer science; Controllability; Extremities; Focusing; Image processing; Observability; Signal processing; Systolic arrays; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 1990 Conference Record Twenty-Fourth Asilomar Conference on
ISSN :
1058-6393
Print_ISBN :
0-8186-2180-X
Type :
conf
DOI :
10.1109/ACSSC.1990.523460
Filename :
523460
Link To Document :
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