Investigation of Gate Oscillation of Power MOSFETs Induced by Avalanche Mode Operation

Serious gate oscillation of power MOSFETs under avalanche condition has been observed, degrading an avalanche withstanding capability. Using experiments as well as numerical simulation, it is shown that this gate oscillation in avalanche mode results from the impact ionized hole carrier accumulation on the surface under the gate oxide and the associated reciprocation between the gate of each unit cell with parasitic elements, which comes from a different phase of a gate capacitance according to a local avalanche breakdown. Experimental results also show that the devices with a poly-cut gate structure and a smaller chip size demonstrate strong immunity against the gate oscillation, which also verifies the new gate oscillation mechanism.