Title :
A pixel level parallel processing architecture for multi-standard video codec
Author :
Tanaka, T. ; Furuta, T. ; Nishida, H. ; Yoshioka, K. ; Kiyohara, T.
Author_Institution :
Platform Dev. Center, Matsushita Electr. Ind. Co. Ltd., Kadoma, Japan
Abstract :
This paper presents an integrated platform for digital AV products. By applying all the parallelisms of pixel level processes, we developed a parallel processing architecture, which is a core component of the platform. This architecture can execute pixel level processes for MPEG2, MPEG4, JPEG, and H.264 codecs.
Keywords :
image resolution; parallel processing; video codecs; video coding; H.264 codecs; JPEG codecs; MPEG2 codecs; MPEG4 codecs; digital AV products; multistandard video codec; pixel level parallel processing; Augmented virtuality; Code standards; Energy consumption; Engines; Filters; Hardware; Image quality; MPEG 4 Standard; Parallel processing; Video codecs;
Conference_Titel :
Consumer Electronics, 2006. ICCE '06. 2006 Digest of Technical Papers. International Conference on
Print_ISBN :
0-7803-9459-3
DOI :
10.1109/ICCE.2006.1598454
