Title :
Parallel hardware implementation of handwritten character recognition system on wavefront array processor architecture
Author :
Kim, Young Joon ; Lee, Seong-Whan ; Kim, Myung-Won
Author_Institution :
Tech. Lab., BIT Comput. Co. Ltd., Seoul, South Korea
Abstract :
In this paper, we describe a parallel hardware implementation of handwritten character recognition system with neural network classifier on wavefront array processor (WAP) architecture. The WAP architecture needs no global clock for controlling the entire processors and each processing element can even be clocked differently. Thus, the clock skew becomes no longer problem and it is possible to construct massively parallel networks which are required for handwritten character recognition. We also present experimental results for the recognition of unconstrained handwritten numerals with the WAP architecture. The results were very impressive in view of real world application
Keywords :
character recognition; character recognition equipment; handwriting recognition; image classification; neural nets; parallel architectures; clock skew; handwritten character recognition; neural network classifier; parallel hardware; unconstrained handwritten numerals; wavefront array processor; Character recognition; Clocks; Communication system control; Computational modeling; Computer architecture; Computer simulation; Handwriting recognition; Neural network hardware; Neural networks; Telecommunication computing;
Conference_Titel :
Document Analysis and Recognition, 1995., Proceedings of the Third International Conference on
Conference_Location :
Montreal, Que.
Print_ISBN :
0-8186-7128-9
DOI :
10.1109/ICDAR.1995.602003
