Performance analysis of SRAM cell for ultralow energy applications

Specific class of applications having moderate throughput and low power budget puts pressing need on ultralow energy level operation of device instead of higher performance. Ultralow energy operation is possible only in subthreshold region and is attractive for hand held devices. However, operating Si-MOSFETs in subthreshold region to achieve low power faces variability and reduced performance problems. Therefore, it is important to investigate the possibility of extending the use of most promising nano device Carbon Nano Tube Field Effect Transistor (CNFET) even for ultra low power (ULP) applications. As SRAM is an important block used in many electronics application therefore this paper investigates CNFET based SRAM for achieving ultralow energy level with better performance. It has been found that the optimized CNFET based cell shows 39% improvement in read SNM, also consume very less leakage power and outperforms in all design features as compared to Si-MOSFET cell.