Noise analysis for time-domain circuits

A charge integrator is an essential building block used in time-based ADCs and sensor readout circuits. In this paper, time-domain noise analysis is used to calculate the effect of all noise sources, including 1/f noise, on the voltage noise variance of the integrator. The results show that for short charge integration intervals, the contribution of 1/f noise sources to the total voltage variance of the integrator is not significant. Different design trade-offs for optimally choosing the capacitance of the integrator and current mirror ratio are discussed. The accuracy of the developed equations is verified by transient noise simulations.