• DocumentCode
    3314163
  • Title

    Power Testing of an FPGA based System Using Modelsim Code Coverage capability

  • Author

    Arshak, Khalil ; Jafer, Essa ; Ibala, Christian

  • Author_Institution
    Univ. of Limerick, Limerick
  • fYear
    2007
  • fDate
    11-13 April 2007
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Field programmable gate arrays (FPGAs) play many important roles, ranging from small glue logic replacement to System-on-Chip designs. Nevertheless, FPGA vendors can not accurately specify the energy consumption information of their products on the device data sheets because the energy consumption of FPGAs is strongly dependent on target circuit including resource utilization, logic partitioning, mapping, placement and route. While major CAD tools have started to report average power consumption under given transition activities, energy optimal FPGA design demands more detailed energy estimation. The target design is telemetry system used for health monitoring applications. The FPGA is acting as the controller unit of both transmitter and receiver. Transmitter side is reading data from interfaced sensors. Verilog-HDL has been used to implement the required functions of the FPGA. In this paper, the power performance of the FPGA based design will be investigated using XILINX Xpower tool. Modelsim Code coverage feature has been incorporated to make sure that the test-bench cover all the nets branch statement of the design and create the most accurate Value Change Dump (VCD) file for the power consumption estimation.
  • Keywords
    field programmable gate arrays; hardware description languages; logic design; FPGA based system; Modelsim code; Verilog-HDL; XILINX Xpower tool; field programmable gate array; power testing; telemetry system; Circuits; Energy consumption; Field programmable gate arrays; Logic design; Logic devices; Power system modeling; Programmable logic arrays; System testing; System-on-a-chip; Transmitters;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Diagnostics of Electronic Circuits and Systems, 2007. DDECS '07. IEEE
  • Conference_Location
    Krakow
  • Print_ISBN
    1-4244-1162-9
  • Electronic_ISBN
    1-4244-1162-9
  • Type

    conf

  • DOI
    10.1109/DDECS.2007.4295273
  • Filename
    4295273