Title :
A general method to design and reconfigure loop-based linear arrays
Author_Institution :
Dept. of Comput. Sci., Univ. of North Texas, Denton, TX, USA
Abstract :
Loop-based defect-tolerant design of linear arrays is easy to manufacture, test and reconfigure. Previous researchers have given ad hoc designs for specific number of neighbors and interconnection patterns. In this paper, we give general results on design and reconfiguration for any number of neighbors and interconnection patterns to achieve best cost/performance
Keywords :
reconfigurable architectures; defect-tolerant design; general design method; interconnection patterns; loop-based linear arrays; reconfiguration; Algorithm design and analysis; Computer aided manufacturing; Computer science; Costs; Delay; Design methodology; LAN interconnection; Switches; Testing; Very large scale integration;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 1994. Proceedings., The IEEE International Workshop on
Conference_Location :
Montreal, Que.
Print_ISBN :
0-8186-6307-3
DOI :
10.1109/DFTVS.1994.630033
