DocumentCode
3315101
Title
Fault tolerance in neural networks
Author
Elsimary, Hamed ; Mashally, Samia ; Shahine, Samir
Author_Institution
Electron. Res. Inst., Cairo, Egypt
fYear
1992
fDate
17-19 Sep 1992
Firstpage
36
Lastpage
39
Abstract
In the hardware realization of neural networks, some physical faults arise during the fabrication that can cause the network to fail. The implementation method will determine the type of fault that will occur. This assertion is examined using a backpropagation (BP) network model for pattern recognition of a subset of the English alphabet, simulated faults in the neurons, and synaptic connections between pairs of neurons. Observing the effects on the system performance when retrieving patterns, it was found that neural networks are tolerant against noise in input pattern and neural networks are tolerant against damage or faults in synaptic links or even neurons. The simulation results showed that, as the probability of damage increases, the network still produces correct results up to a certain limit. This BP model and the Hopfield model were compared for the same application (pattern recognition), which showed that the BP model is better in the sense that the number of nodes is not varied with the number of example patterns as in the case of the Hopfield model
Keywords
character recognition; fault tolerant computing; neural nets; English alphabet; Hopfield model; backpropagation; hardware realization; neural networks; pattern recognition; probability of damage; Artificial neural networks; Concurrent computing; Fabrication; Fault tolerance; Intelligent networks; Neural networks; Neurons; Pattern recognition; Robustness; System performance;
fLanguage
English
Publisher
ieee
Conference_Titel
Systems Engineering, 1992., IEEE International Conference on
Conference_Location
Kobe
Print_ISBN
0-7803-0734-8
Type
conf
DOI
10.1109/ICSYSE.1992.236948
Filename
236948
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