ARCHER: Communication-based predictive architecture selection for application specific multiprocessor Systems-on-Chip

The need for Multiprocessor Systems-on-Chip (MPSoCs) to satisfy performance demands of applications in embedded systems has enabled vendors to create different communication architectures for MPSoCs. It is a challenge to rapidly identify the best communication architecture and its best configuration, in terms of task mapping and buffer size, for a given application. In this paper, we propose a novel predictive methodology to first quickly predict the communication architecture and then iteratively search for the optimal configuration of the selected MPSoC architecture. A correction approach is applied at the end to make sure that the selected MPSoC architecture and its configuration is the best suited for the area and application latency constraints. Our exploration is significantly quicker than a Particle Swarm approach, achieving an improvement factor of 15 and 87 in solving time when using fresh hardware and existing hardware builds respectively. While our approach is mostly accurate in finding the optimal solution, certain inaccuracies are observed due to less accurate corrector.