DocumentCode
3316048
Title
Performance enhancement in aggressively scaled CMOS devices higher carrier activation with laser spike annealing
Author
Yamamoto, Tomonari ; Kubo, Tomohiro ; Sukegawa, Takae ; Wang, Yun ; Feng, Lucia ; Talwar, Somit ; Kase, Masataka
Author_Institution
Fujitsu Ltd., Akiruno, Japan
fYear
2005
fDate
7-8 June 2005
Firstpage
19
Lastpage
22
Abstract
We have investigated in depth the impact of higher carrier activation by laser spike annealing (LSA), and demonstrate that LSA can improve the ion current while suppressing short channel effect in sub-40-nm CMOS devices compared to the conventional spike RTA. A shallower junction depth and shorter SDE overlap length can be achieved for the same SDE sheet resistance by using LSA, and as a result, Vth-rolloff can be improved dramatically. Moreover, the higher carrier activation of LSA produced improvements in ion current of 3%/14% for PMOS/NMOS. We also demonstrate that a 13% improvement in ion can be achieved for PMOS at the same Vth-rolloff.
Keywords
CMOS integrated circuits; ion mobility; laser beam annealing; semiconductor junctions; CMOS devices; PMOS-NMOS; carrier activation; ion current; laser spike annealing; shallower junction depth; sheet resistance; short channel effect; Annealing; Boron; CMOS process; Epitaxial growth; Fabrication; Implants; Lamps; MOS devices; Solid lasers; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Junction Technology, 2005. Extended Abstracts of the Fifth International Workshop on
Print_ISBN
4-9902158-6-9
Type
conf
DOI
10.1109/IWJT.2005.203868
Filename
1598654
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