Minimization of pattern dependence by optimized flash lamp annealing

Author

Ito, T. ; Matsuo, K. ; Itokawa, H. ; Itani, T. ; Tarnaoki, N. ; Honguh, Y. ; Suguro, K. ; Yokomori, T. ; Owada, T. ; Goto, Y. ; Nozaki, Y. ; Murayama, H. ; Kiyama, H. ; Kusuda, T.

Author_Institution

Semicond. Co., Toshiba Corp., Yokohama, Japan

fYear

2005

fDate

7-8 June 2005

Firstpage

63

Lastpage

64

Abstract

This paper presents the improvement of the flash lamp annealing (FLA) process to achieve the ultra-shallow junction (USJ) requirement for high-performance CMOSFETs. Issues concerning ultra-rapid activation are discussed; namely, crystal damage (residual defect, deformation and crack) and pattern dependence, We report that the FLA process with long pulse duration and cap layers can improve USJ characteristics for various design-scale cells.

Keywords

CMOS integrated circuits; MOSFET; cracks; crystal defects; deformation; incoherent light annealing; FLA; USJ characteristics; crack; crystal damage; deformation; high-performance CMOSFET; optimized flash lamp annealing process; pattern dependence; residual defect; ultrashallow junction; Annealing; CMOS technology; CMOSFETs; Lamps; Leakage current; Manufacturing processes; Pulse measurements; Semiconductor device manufacture; Surface cracks; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Junction Technology, 2005. Extended Abstracts of the Fifth International Workshop on

Print_ISBN

4-9902158-6-9

Type

conf

DOI

10.1109/IWJT.2005.203882

Filename

1598668