• DocumentCode
    3317010
  • Title

    System level packaging: an alternative to monolithic ULSI?

  • Author

    Pease, R.F.W.

  • Author_Institution
    Center for Integrated Syst., Stanford Univ., CA, USA
  • fYear
    1990
  • fDate
    9-12 Dec. 1990
  • Firstpage
    971
  • Lastpage
    974
  • Abstract
    Significant developments taking place in system level packaging are reviewed. The following issues are addressed: heat dissipation, interconnections, and silicon as a substrate material. Denser packaging leads to shorter chip-to-chip interconnects with concomitant improvements in speed, power and, presumably, cost. It is concluded that, in the near future, system level packaging might well be a more attractive investment for research and development than new technology for monolithic ULSI. However, the resulting significant improvement in packaging performance will revive the need to improve chip performance.<>
  • Keywords
    integrated circuit technology; packaging; Si substrate material; heat dissipation; interconnections; multichip packaging; system level packaging; Costs; Investments; Packaging; Power system interconnection; Research and development; Silicon; Ultra large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1990. IEDM '90. Technical Digest., International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0163-1918
  • Type

    conf

  • DOI
    10.1109/IEDM.1990.237078
  • Filename
    237078