DocumentCode :
3317184
Title :
Optimising electronic manufacturing processes
Author :
Doniavi, A. ; Mileham, A.R. ; Newnes, L.B.
Author_Institution :
Dept. of Mech. Eng., Bath Univ., UK
fYear :
1999
fDate :
1999
Firstpage :
63
Lastpage :
68
Abstract :
This paper describes a framework for use in electronic manufacturing system optimisation using a systems approach. The framework consists of three phases. Phase 1 is the system-modelling phase where a model of the system to be optimised is created. Phase 2 involves system analysis and control. In this phase, the focus is on identifying manufacturing process areas where analysis and control must be undertaken. A collection of techniques can be used systematically to generate such information and provide an understanding of individual process capability. These techniques include process capability indices, measurement operation evaluation indices and process failure mode and effect critical analysis. The final phase is used to optimise the system using techniques such as experimental design and response surface models. This paper describes the proposed framework and examines its use within the three main areas of electronic manufacturing: PCB manufacture, Si device manufacture and electronic assembly. The framework has been validated within semiconductor, assembly and PCB manufacturing plants. Within the semiconductor facility, one of the stages of the framework investigated was the process capability ratio (PCR), stage IV of the framework. PCR techniques were used to explain the relationship between the technical specification and the production capabilities. Various PCR indices were used such as Cp, Cpk and Cpm and these were generated for various GTO thyristor operations. Use of the Cpk index is illustrated as a means of determining whether the process for gallium resistivity is capable
Keywords :
assembling; circuit optimisation; design of experiments; integrated circuit manufacture; printed circuit manufacture; semiconductor device manufacture; surface fitting; thyristors; GTO thyristor operations; Ga; PCB manufacture; PCB manufacturing plant; PCR indices; PCR techniques; Si; Si device manufacture; electronic assembly; electronic manufacturing; electronic manufacturing process optimisation; electronic manufacturing system optimisation; experimental design; gallium resistivity; manufacturing process; measurement operation evaluation indices; optimisation framework; process capability; process capability indices; process capability ratio; process failure mode/effect critical analysis; production capability; response surface models; semiconductor facility; system analysis; system control; system model; system optimisation; system-modelling phase; systems approach; technical specification; Assembly; Control system analysis; Control systems; Design optimization; Failure analysis; Manufacturing processes; Manufacturing systems; Pulp manufacturing; Semiconductor device manufacture; Thyristors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Manufacturing Technology Symposium, 1999. Twenty-Fourth IEEE/CPMT
Conference_Location :
Austin, TX
ISSN :
1089-8190
Print_ISBN :
0-7803-5502-4
Type :
conf
DOI :
10.1109/IEMT.1999.804797
Filename :
804797
Link To Document :
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