Title :
Macro-cell placement in a multiprocessor environment
Author :
Sastry, L.V.P. ; Zargham, M.R.
Author_Institution :
Dept. of Comput. Sci., Southern Illinois Univ., Carbondale, IL, USA
Abstract :
A parallel algorithm for the placement of macrocells in VLSI design is presented. The algorithm is based on the blackboard model, and is suitable for implementation on a shared-memory multiprocessor environment. The placement procedure is started by choosing and placing a macrocell at the center of the chip, based on certain criteria such as maximum connectivity and connections to maximum number of macrocells. The remaining macrocells are assigned to different processors. Then, all the processors, in parallel, place on the chip the macrocells assigned to them in an intelligent and opportunistic manner, until all the macrocells are placed. The algorithm has been implemented in C and runs on the Sequent Balance 8000 multiprocessor. Several tables are included to show the performance of the algorithm with respect to the different number of processors. It was found that the proposed algorithm gave high-quality placements in most of the examples that were run. Very good speed-ups were obtained as the number of processors was varied, with the best speed-up being 3.48 using five processors
Keywords :
VLSI; circuit layout CAD; parallel algorithms; C language; Sequent Balance 8000; VLSI design; blackboard model; macrocells; maximum connectivity; multiprocessor environment; parallel algorithm; placement; speed-ups; Algorithm design and analysis; Clustering algorithms; Costs; NP-complete problem; Parallel algorithms; Phase estimation; Propagation delay; Robustness; Shape; Simulated annealing;
Conference_Titel :
Southeastcon '89. Proceedings. Energy and Information Technologies in the Southeast., IEEE
Conference_Location :
Columbia, SC
DOI :
10.1109/SECON.1989.132408