DocumentCode
3317792
Title
Plated copper on ceramic manufacturing technology advances into RF and CSP assembly systems
Author
Balents, Leon ; Christopher, Ken ; Skoczylas, Dan
Author_Institution
Zecal Corp., Churchville, NY, USA
fYear
1999
fDate
1999
Firstpage
294
Lastpage
303
Abstract
A copper on ceramic plating technology which offers good versatility in a wide range of applications is being recognized for its robustness and cost effective ease of use. It is a wet process that follows precision laser hole drilling, that produces robust copper-plated-through and filled micro-vias. Design and manufacturing equipment and methods used to produce these substrates are described. In high frequency applications, the characteristics that provide the performance gains are described. Several resonator test structures used to validate the performance are described. Other useful active and passive components demonstrating high frequency performance are illustrated. Enhanced thermal capability with heat-spreading copper and filled copper vias is illustrated using simple equations and calculations. Roadmaps of packaging trends in RF circuitry illustrating trends in structures using conductor on ceramic technology moving away from screen printed thick film conductors and photo-defined/etched back thick film materials to this “photo-formed” technology are described. The extra precision on rigid CTE matched ceramic, the RF requirements and cost-effectiveness of the technology is leading the packaging efforts of system designers from wire bonding to flip-chip assembly structures. The movement from packaged CBGAs and CSPs to flip-chip die in RF modules is described
Keywords
chip scale packaging; copper; electroplating; flip-chip devices; hybrid integrated circuits; integrated circuit interconnections; microassembling; microwave integrated circuits; photolithography; CSP assembly systems; CSPs; Cu; RF assembly systems; RF circuitry; RF modules; RF requirements; active components; conductor on ceramic technology; copper on ceramic plating technology; cost effectiveness; cost-effectiveness; filled copper vias; flip-chip assembly structures; flip-chip die; heat-spreading copper; high frequency applications; high frequency performance; laser hole drilling; manufacturing equipment; packaged CBGAs; packaging; packaging trend roadmaps; passive components; performance gains; performance validation; photo-defined/etched back thick film materials; photo-formed technology; plated copper on ceramic manufacturing technology; resonator test structures; rigid CTE matched ceramic; robust copper-plated-through micro-vias; robustness; screen printed thick film conductors; thermal capability; wet process; wire bonding; Ceramics; Conducting materials; Conductive films; Copper; Costs; Manufacturing; Packaging; Radio frequency; Robustness; Thick films;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Manufacturing Technology Symposium, 1999. Twenty-Fourth IEEE/CPMT
Conference_Location
Austin, TX
ISSN
1089-8190
Print_ISBN
0-7803-5502-4
Type
conf
DOI
10.1109/IEMT.1999.804836
Filename
804836
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