Title :
Enhanced degradation of oxide breakdown in the peripheral region by metallic contamination
Author :
Uchida, H. ; Aikawa, I. ; Hirashita, N. ; Ajioka, T.
Author_Institution :
Oki Electr. Ind. Co. Ltd., Tokyo, Japan
Abstract :
A novel oxide breakdown model based on the assumption that defects are distributed randomly in gate area and in the peripheral region is proposed. The time-dependent dielectric breakdown (TDDB) characteristics are interpreted by this model for samples with various metallic contamination levels, which are prepared by wet cleaning before gate oxidation. The calculated lifetime agrees well with TDDB data for various contamination levels. The defect density in gate area shows a slight dependence on the metallic impurity concentration, while the defect density in the peripheral region drastically increases with the concentration. This indicates that metallic contamination enhances the degradation of oxide breakdown at the field oxide edge.<>
Keywords :
MOS integrated circuits; circuit reliability; electric breakdown of solids; impurity distribution; insulated gate field effect transistors; metal-insulator-semiconductor structures; semiconductor device models; MOSFET; MOSIC; TDDB data; VLSI; breakdown model; calculated lifetime; defect density; field oxide edge; gate area; gate oxidation; metallic contamination; metallic impurity concentration; oxide breakdown; peripheral region; randomly distributed defects; time-dependent dielectric breakdown; wet cleaning; Cleaning; Contamination; Degradation; Dielectric breakdown; Electric breakdown; Impurities; Oxidation;
Conference_Titel :
Electron Devices Meeting, 1990. IEDM '90. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/IEDM.1990.237146