DocumentCode :
3317961
Title :
Analysis of submicron double-gated polysilicon MOS thin film transistors
Author :
Adan, A.O. ; Ono, S. ; Shibayama, H. ; Miyake, R.
Author_Institution :
Sharp Corp., Nara, Japan
fYear :
1990
fDate :
9-12 Dec. 1990
Firstpage :
399
Lastpage :
402
Abstract :
Double-gated poly-Si MOS thin film transistors (TFTs), having two gate electrodes (top and bottom) connected together, are analyzed by the numerical solution of the Poisson equation. It is found that for fully inverted films there is a strong coupling of the top and bottom channels, resulting in a more efficient channel charge modulation and substantial improvement of electrical characteristics: reduction of subthreshold swing, reduction of threshold voltage, enhancement of drive current, and suppression of punch-through degradation in submicron channel length TFTs. By applying the double-gated structure, submicron poly Si PMOS TFTs have been realized with 0.6 mu m channel length, OFF current of 0.4 pA/ mu m, and ON/OFF ratio >5*15/sup 5/, demonstrating the applicability of this device in ULSI SRAM cells.<>
Keywords :
MOS integrated circuits; elemental semiconductors; semiconductor device models; silicon; thin film transistors; 0.6 micron; MOS thin film transistors; Poisson equation; TFT; ULSI SRAM cells; channel charge modulation; channel coupling; charge sheet model; double-gated structure; drive current; electrical characteristics; fully inverted films; gate electrodes; polycrystalline Si; polysilicon; punch-through degradation; submicron channel length; subthreshold swing; threshold voltage; Degradation; Electric variables; Electrodes; Poisson equations; Random access memory; Thin film transistors; Threshold voltage; Ultra large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1990. IEDM '90. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
ISSN :
0163-1918
Type :
conf
DOI :
10.1109/IEDM.1990.237147
Filename :
237147
Link To Document :
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