Title :
Multiple layer parallel motion estimation on GPU for High Efficiency Video Coding (HEVC)
Author :
Falei Luo ; Siwei Ma ; Juncheng Ma ; Honggang Qi ; Li Su ; Wen Gao
Author_Institution :
Inst. of Comput. Technol., Beijing, China
Abstract :
This paper provides a multiple-layer parallel motion estimation (ME) scheme implemented on GPU for High Efficiency Video Coding (HEVC). The scheme is hierarchically structured, including four layers: coding tree unit (CTU), prediction unit (PU), motion vector (MV) selection and instruction optimization. In PU-layer, costs of various PU sizes were obtained through a SAD (sum of absolute differences) look-up table instead of progressive cost merging. And during MV selection, GPU´s comparison instruction was used to avoid branches. At the same time, concurrent CTUs processing and SIMD (Single Instruction, Multiple Data) optimization also improve the performance significantly. Experimental results show that the proposed scheme can take full advantage of GPU and achieves over 90 times speedup compared with the HM10.0 using fast ME.
Keywords :
graphics processing units; instruction sets; motion estimation; optimisation; parallel architectures; video coding; GPU; HEVC; MV selection; PU-layer; SAD look-up table; SIMD optimization; coding tree unit; high efficiency video coding; instruction optimization; motion vector selection; multiple layer parallel motion estimation; prediction unit; progressive cost merging; single instruction multiple data; sum of absolute difference; Encoding; Graphics processing units; Indexing; Motion estimation; Optimization; Table lookup; Video coding; CUDA; GPU; HEVC; ME; parallelization;
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon
DOI :
10.1109/ISCAS.2015.7168835