DocumentCode :
3318268
Title :
35 GHz/35 psec ECL pnp technology
Author :
Warnock, J. ; Lu, P.-F. ; Cressler, J.D. ; Jenkins, K.A. ; Sun, J.Y.C.
Author_Institution :
IBM Thomas J. Watson Res. Centre, Yorktown Heights, NY, USA
fYear :
1990
fDate :
9-12 Dec. 1990
Firstpage :
301
Lastpage :
304
Abstract :
The authors report how self-aligned pnp devices with basewidths close to 50 nm have been fabricated using a preamorphizing Ge implant prior to the As base implant. They investigated the sensitivity of pnp performance to collector epi thickness, base width and the energy of the base implant, culminating in the achievement of devices with f/sub T/ as high as 38 GHz. ECL (emitter coupled logic) ring oscillators built with these pnp devices have delays as small as 35 ps per stage, demonstrating that the device parasitics have been successfully minimized. Both the f/sub T/ of 38 GHz and the 35 ps ECL delay represent new records for pnp devices, showing a performance level comparable to that of current high-performance npn technologies.<>
Keywords :
arsenic; bipolar integrated circuits; bipolar transistors; elemental semiconductors; emitter-coupled logic; germanium; integrated circuit technology; oscillators; semiconductor doping; silicon; 35 ps; 35 to 38 GHz; 50 nm; ECL pnp technology; Si:Ge, As; base implant energy; base width; collector epi thickness; cut off frequency; emitter coupled logic; gate propagation delay; parasitics minimisation; performance level; preamorphizing Ge implant; ring oscillators; self-aligned pnp devices; semiconductors; Delay; Implants; Logic devices; Ring oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1990. IEDM '90. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
ISSN :
0163-1918
Type :
conf
DOI :
10.1109/IEDM.1990.237170
Filename :
237170
Link To Document :
بازگشت