Title :
Sub-30ps ECL circuits using high-f/sub T/ Si and SiGe epitaxial base SEEW transistors
Author :
Burghartz, J.N. ; Comfort, J.H. ; Patton, G.L. ; Cressler, J.D. ; Meyerson, B.S. ; Stork, J.M.C. ; Sun, J.Y.-C. ; Scilla, G. ; Warnock, J. ; Ginsberg, B.J. ; Jenkins, K. ; Toh, K.-Y. ; Harame, D.L. ; Mader, S.R.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
A high-performance bipolar technology is presented which involves Si and SiGe epitaxial base formation in a selective epitaxy emitter window (SEEW) structure. Si transistors have cut-off frequencies (f/sub T/) of 35-53 GHz while the f/sub T/ of SiGe devices ranges from 45 GHz to 63 GHz. The SEEW structure allowed emitter width reduction to 0.35 mu m using optical lithography with 0.8 mu m minimum linewidth to operate the device at high current density near maximum f/sub T/. The ECL (emitter coupled logic) gate delay is examined as function of the trade-off between f/sub T/ and intrinsic base resistance and of the main device parasitics, i.e., base resistance and collector-base capacitance. A minimum ECL gate delay of 24.3 ps was realized in an unloaded ECL ring oscillator.<>
Keywords :
Ge-Si alloys; emitter-coupled logic; oscillators; photolithography; semiconductor epitaxial layers; 0.35 micron; 0.8 micron; 30 to 24.3 ps; 35 to 63 GHz; ECL; Si; SiGe epitaxial base; base resistance; collector-base capacitance; cut-off frequencies; device parasitics; emitter coupled logic; emitter width reduction; gate delay; high current density; intrinsic base resistance; optical lithography; ring oscillator; selective epitaxy emitter window; Circuits; Current density; Cutoff frequency; Delay; Epitaxial growth; Germanium silicon alloys; Lithography; Optical devices; Silicon germanium; Stimulated emission;
Conference_Titel :
Electron Devices Meeting, 1990. IEDM '90. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/IEDM.1990.237171
