Title :
Fuzzy simulated evolution for power and performance optimization of VLSI placement
Author :
Sait, Sadiq M. ; Youssef, Habib ; Khan, Junaid A. ; El-Maleh, Aiman
Author_Institution :
King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia
Abstract :
In this paper, an algorithm for VLSI standard cell placement for low power and high performance design is presented. This is a hard multiobjective combinatorial optimization problem with no known exact and efficient algorithm that can guarantee finding a solution of specific or desirable quality. Approximation iterative heuristics such as simulated evolution (SE) are best suited to perform an intelligent search of the solution space. SE comprises three steps, evaluation, selection and allocation. Due to imprecise nature of design information at the placement stage, the various objectives and constraints are expressed in fuzzy domain. The search is made to evolve towards a vector of fuzzy goals. In this work, a new method to calculate membership in evaluation stage is proposed. Selection stage is also fuzzified and a new controlled fuzzy operator is introduced. The proposed heuristics is compared with genetic algorithm (GA) and the proposed fuzzy operator is compared with fuzzy ordered weighted averaging operator (OWA). Fuzzified SE (FSE) with controlled fuzzy operators was able to achieve better solutions
Keywords :
VLSI; approximation theory; circuit layout CAD; circuit optimisation; combinatorial mathematics; evolutionary computation; fuzzy logic; heuristic programming; integrated circuit layout; iterative methods; low-power electronics; FSE; SE; VLSI standard cell placement; approximation iterative heuristics; controlled fuzzy operators; fuzzified SE; fuzzy domain; fuzzy operator; fuzzy simulated evolution; high-performance design; intelligent search; low-power design; multiobjective combinatorial optimization problem; performance optimization; power optimization; simulated evolution; Costs; Delay estimation; Fuzzy control; Integrated circuit interconnections; Iterative algorithms; Optimization; Power dissipation; Switching circuits; Very large scale integration; Virtual manufacturing;
Conference_Titel :
Neural Networks, 2001. Proceedings. IJCNN '01. International Joint Conference on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-7044-9
DOI :
10.1109/IJCNN.2001.939116