DocumentCode
3318438
Title
A TiN strapped polysilicon gate cobalt salicide CMOS process
Author
Pfiester, J.R. ; Mele, T.C. ; Limb, Y. ; Jones, R.E. ; Woo, M. ; Boeck, B. ; Gunderson, C.D.
Author_Institution
Motorola, Inc., Austin, TX, USA
fYear
1990
fDate
9-12 Dec. 1990
Firstpage
241
Lastpage
244
Abstract
A novel TiN strapped polysilicon gate cobalt salicide process has been developed for a submicron CMOS technology. The resulting MOSFET structure consists of a TiN strapped polysilicon gate electrode and self-aligned cobalt silicided source/drain junctions. This structure provides a low-sheet-resistance polysilicon gate with shallow, low-leakage source/drain junctions, while avoiding the lateral dopant interdiffusion of silicided gates. Furthermore, the TiN strapped layer eliminates cobalt silicide creep and bridging over the oxide sidewall spacers between the gate and source/drain regions.<>
Keywords
CMOS integrated circuits; integrated circuit technology; metallisation; silicon compounds; titanium compounds; CoSi/sub 2/; MOSFET structure; TiN; TiN strapped polysilicon gate electrode; low-sheet-resistance polysilicon gate; salicides; shallow junctions; silicided gates; silicides; submicron CMOS technology; CMOS process; CMOS technology; Cobalt; Creep; Electrodes; MOSFET circuits; Silicides; Tin;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1990. IEDM '90. Technical Digest., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Type
conf
DOI
10.1109/IEDM.1990.237184
Filename
237184
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