Modeling and simulation of the 16 megabit EPROM cell for write/read operation with a compact SPICE model

A compact SPICE model to stimulate an EPROM cell is presented. Starting from the physics-based MOS model and taking into account impact ionization and the parasitic bipolar effect, ´avalanche´ leading to snap-back is described. Gate current, based on the ´lucky-electron´ model, is integrated in one dimension along the channel. The floating gate voltage is induced by external biases and trapped charges. Threshold voltage as seen from the control gate is considered. Results from simulations of transient behavior during writing and reading operations are shown; they were satisfactorily used for the submicron cell in the design of the 16 megabit EPROM.<>