DocumentCode
3318584
Title
Effects of the lightly doped drain configuration on capacitance characteristics of submicron MOSFETs
Author
Smedes, T. ; Klaassen, F.M.
Author_Institution
Eindhoven Univ. of Technol., Netherlands
fYear
1990
fDate
9-12 Dec. 1990
Firstpage
197
Lastpage
200
Abstract
Measurements and simulations show that an LDD (lightly doped drain) configuration has a considerable effect on MOSFET capacitance characteristics. The effects have been included in a circuit-level capacitance model in an explicit form, avoiding the need for extra nodes in the MOSFET model. The presented model yields clearly improved accuracy.<>
Keywords
MOS integrated circuits; capacitance; insulated gate field effect transistors; semiconductor device models; LDD configuration; capacitance characteristics; circuit-level capacitance model; intrinsic charge model; lightly doped drain; simulations; submicron MOSFETs; Capacitance measurement; Capacitance-voltage characteristics; Circuit simulation; MOSFET circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1990. IEDM '90. Technical Digest., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Type
conf
DOI
10.1109/IEDM.1990.237194
Filename
237194
Link To Document